A method to design a fast chaotic oscillator using CCTA

This article introduces a novel method for designing a fast chaotic oscillator using a CCTA (Current Conveyor Transconductance Amplifier) based on Chua's circuit. The proposed method uses innovative configurations and advanced simulation techniques to overcome challenges in high-speed operation, nonlinear dynamics, and Analog Building Block (ABB) selection. The design begins with nonlinear negative resistance, essential for Chua's diode characteristics, including two negative resistances, NR1 and NR2. The circuit integrates one CCTA block, two grounded capacitors, two fixed resistors, one inductor, and one potentiometer. It is simulated using PSPICE with IC (Integrated Circuit) macro-models and 180nm CMOS (Complementary Metal Oxide Semiconductor) technology. Various chaotic waveforms and attractors are produced, validating the theoretical and mathematical predictions. By varying the resistance values (1450Ω, 1650Ω, 1800Ω, 1950Ω), the circuit exhibits different chaotic behaviors, such as large limit cycles, double-scroll attractors, Rossler-type attractors, and I-periodic attractors. FFT (Fast Fourier Transform) analysis confirms the highest dominant operating frequency of 37.5MHz. A Monte Carlo simulation with 100 runs shows maximum voltage variations in the chaotic waveforms of 5.21 % and 4.61 % across the capacitors, demonstrating robustness and reliability. This design offers significant advancements in implementing high-frequency chaotic oscillators, with potential applications in various fields requiring chaotic signal generation.• A novel design of Chua's diode and Chua's chaotic oscillator using only one CCTA block is presented in this paper.• The proposed chaotic oscillator achieves the highest operating frequency of 37.5MHz.• The proposed circuit is simulated using commercially available ICs (MAX435 and AD844) and CMOS 180nm technology in PSPICE to confirm its workability.


a b s t r a c t
This article introduces a novel method for designing a fast chaotic oscillator using a CCTA (Current Conveyor Transconductance Amplifier) based on Chua's circuit.The proposed method uses innovative configurations and advanced simulation techniques to overcome challenges in high-speed operation, nonlinear dynamics, and Analog Building Block (ABB) selection.The design begins with nonlinear negative resistance, essential for Chua's diode characteristics, including two negative resistances, NR 1 and NR 2 .The circuit integrates one CCTA block, two grounded capacitors, two fixed resistors, one inductor, and one potentiometer.It is simulated using PSPICE with IC (Integrated Circuit) macro-models and 180nm CMOS (Complementary Metal Oxide Semiconductor) technology.Various chaotic waveforms and attractors are produced, validating the theoretical and mathematical predictions.By varying the resistance values (1450 Ω , 1650 Ω , 1800 Ω , 1950 Ω ), the circuit exhibits different chaotic behaviors, such as large limit cycles, double-scroll attractors, Rossler-type attractors, and I-periodic attractors.FFT (Fast Fourier Transform) analysis confirms the highest dominant operating frequency of 37.5MHz.A Monte Carlo simulation with 100 runs shows maximum voltage variations in the chaotic waveforms of 5.21 % and 4.61 % across the capacitors, demonstrating robustness and reliability.This design offers significant advancements in implementing high-frequency chaotic oscillators, with potential applications in various fields requiring chaotic signal generation.
• A novel design of Chua's diode and Chua's chaotic oscillator using only one CCTA block is presented in this paper.• The proposed chaotic oscillator achieves the highest operating frequency of 37.5MHz.
• The proposed circuit is simulated using commercially available ICs (MAX435 and AD844) and CMOS 180nm technology in PSPICE to confirm its workability.

Background
Chaotic signals are widely acknowledged for their multiple benefits, encompassing secure communication [ 1 ], heart rate assessment [ 2 ], circuit stabilization [ 3 ], packet switching in computer networks [ 4 ], chaos management in robotic devices [ 5 ], and visual sensing [ 6 ].Chua's circuit is a renowned and simple chaotic oscillator that can produce chaos, and it has attracted the attention of researchers in the domain of nonlinear dynamical circuits and systems.Fig. 1 shows the schematic of Chua's circuit [ 7 ], which comprises one linear resistor (R), one linear inductor (L), two linear capacitors (C 1 and C 2 ), and one nonlinear resistor (NR), also called Chua's diode [ 7 ].The terms (V C1 and V C2 ) are voltages across capacitors (C 1 and C 2 ), respectively, and i L is the current flow through the inductor (L).Chua's diode is the essential component of Chua's circuit since it imparts nonlinear qualities to the system.Generally, a Chua's diode has been implemented by connecting two voltage-controlled negative impedance converters in parallel [ 7 ].This type of implementation employs at least two typical voltage-mode op-amps and many resistors.The V-I characteristics of Chua's diode is depicted in Fig. 2 , which shows the non-linearity with negative slopes.In Fig. 2 , m 1 and m 0 correspond to the slopes of the inner and outer straight lines, respectively, while ± BP denotes the breakpoints [ 7 ].Due to the voltage-mode blocks like op-amp and more resistors, Chua's circuit's operating frequency is restricted to a few kHz ranges.Therefore, an improved version of the chaotic oscillator using a high-performance current-mode block and few resistors is proposed, which runs faster and achieves the highest operating frequency of 37.5MHz.
Numerous research articles on chaotic electronic circuit realizations of well-known dynamical systems in mathematics have been reported.These circuits can be called voltage-mode chaotic circuits because many use voltage-mode blocks like op-amp as active elements.However, voltage-mode circuits suffer from low slew rates and fixed gain-band products, which substantially impact the operating frequency of voltage-mode chaotic circuits [ 8 ].At the same time, literature witnesses the transferral of analog integrated circuit implementation from voltage-mode to current-mode circuits, whereby transmissible signals are currents rather than voltages.The current-mode equivalents have low power consumption, a high slew rate, and wide signal bandwidth compared to their voltagemode counterparts [ 9 , 10 ].Designing a chaotic oscillator presents numerous significant difficulties and challenges that must be addressed with precision and ingenuity.One such challenge involves achieving high-speed operation, necessitating careful design considerations to ensure signal integrity and stability at such fast speeds.Another critical aspect is the selection of an Analog Building Block (ABB), where choosing components with the required bandwidth, linearity, and noise performance is crucial.Furthermore, accurately simulating the circuit behavior, including nonlinear dynamics and high-frequency effects, is challenging.Addressing these challenges requires a multidisciplinary approach involving expertise in analog design, nonlinear dynamics, signal processing, and experimental validation.
Several studies have been conducted to develop different Chua's circuit architectures as a chaotic model.Most of the methods revolve around the design of a simple Chua's diode, also called Non-linear Resistor (NR), because it is the essential component of the Chua circuit, responsible for non-linearity.As a result, different Chua's oscillator circuits have centered on the straightforward and efficient Chua's diode, employing fewer active and passive electrical components.
To overcome the major difficulties and challenges associated with design, the proposed research likely introduced several original achievements.The research likely introduced a novel circuit topology tailored to meet the requirements of high-speed operation and nonlinear dynamics.This topology incorporates innovative configurations of active and passive components to achieve the desired performance characteristics.Advanced simulation techniques have been employed to accurately model the oscillator's behavior, including nonlinear dynamics.One of the primary achievements would be achieving the targeted high operating frequency while maintaining stable and reliable chaotic behavior.
The evidence mentioned above sheds light on the fantastic phenomena of Chua's circuit and enables the implementation of Chua's circuit using various active building blocks.One of the most adaptable and practical current-mode building blocks is the Current Conveyor Transconductance Amplifier (CCTA) [22][23][24][25][26].
The CCTA has a number of important benefits, including increased dynamic range, wide bandwidth, high linearity, high input impedance, low output impedance, adaptability in design, temperature stability, ease of integration, and versatility that is useful in filtering, oscillation, and signal transformation tasks [22][23][24][25][26].
Adopting a CCTA-based approach to build the Fast Chaotic Oscillator marks a significant advancement in circuit design.Key highlights of this innovation include the introduction of a novel Chua's diode and Chua's chaotic oscillator, achieved with just one CCTA block, showcasing efficiency and simplicity.CCTAs have strong linearity, enhancing accuracy and fidelity in chaotic signal production.Compared to alternative approaches, this can result in more steady and predictable chaotic behavior.Notably, the CCTAs are also renowned for their fast operation and large bandwidth, which allow the oscillator to reach the desired operating frequency of 37.5MHz.This makes it possible to interpret signals more quickly and improves performance in high-frequency applications.
Due to this device's increasing interest, many analog function circuits have been developed.This research article proposes a single CCTA-based Chua's diode that can generate well-known chaotic attractors.It gives a chance to investigate the ongoing developments in current-mode circuits.
The research innovation of the proposed Fast Chaotic Oscillator represents the novelty of the circuit by overcoming the research gaps in the literature.The circuit's novelty is underlined by several key features.Firstly, a novel design of Chua's diode and Chua's chaotic oscillator using only one CCTA block is presented in this paper.The proposed chaotic oscillator achieves the highest operating frequency of 37.5 MHz.Simulation results further validate the circuit's capabilities, with the development of chaotic attractors such as large limit cycle, double-scroll attractor, Rossler-type attractor, and I-periodic attractor, affirming theoretical and mathematical predictions.Practical feasibility is confirmed through simulations using commercially available ICs (MAX435 and AD844) and CMOS 180 nm technology in PSPICE.Additionally, a Monte Carlo simulation is conducted to assess the uncertainty and robustness of the proposed Chua chaotic circuit, further establishing its reliability and applicability in real-world scenarios.

Method details
The equations involved in the traditional chaotic oscillator, shown in Fig. 1 , are discussed first in this section, followed by the method to design the proposed CCTA-based fast chaotic oscillator.
The following differential equations govern the dynamics of the Chua's circuit of Fig. 1 [ 7 ].where voltage through C 1 , voltage through C 2 , and current via L correspond to state variables V C1 , V C2 , and   respectively.The slopes of the outer and inner areas are represented by m 0 and m 1 , respectively.± V BP signifies the breakpoints presented in Fig. 2 for a piecewise linear NR in Chua's circuit.The Chua's circuit is a third-order chaotic oscillator whose characteristic equation is defined as [ 17 ]: From Eq. ( 5) , the CO (Condition of Oscillation) and FO (Frequency of Oscillation) can be obtained as [ 17 ]: Current conveyor transconductance amplifier CCTA The Current Conveyor Transconductance Amplifier (CCTA) [ 22 ] is a versatile current-mode block that can work both in Voltage-Mode (VM) and Current-Mode (CM) circuits.The circuit symbol of the CCTA is shown in Fig. 3 .It has four Input/output (I/O) terminals.A possible CMOS implementation and an IC-based implementation of it, which are used in the simulation, are depicted in Figs. 4 and 5 , respectively.In Fig. 4 , a CMOS implementation of the Second-Generation Current Conveyor (CCII) is cascaded with the Arbel-Goldminz CMOS cell of the Operational Transconductance Amplifier (OTA) for implementing the CMOS-based CCTA.The gate terminals of Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), M3, M4, and M5, are fed by the voltage source V1.The current sources, I1 and I2, determine the transconductance gain g m .In Fig. 5 , two high-performance ICs, AD844 and MAX435, are cascaded to implement the IC-based CCTA.The AD844 is a Current Feedback Operational Amplifier (CFOA) IC manufactured by  The electrical characteristics of CCTA are as follows [ 22 ]:

Implementation of Chua diode
A CCTA-based straightforward Chua diode is implemented using two negative resistances, NR 1 and NR 2 .Negative resistance is a special type of synthetic resistance that exhibits a negative slope in its V-I characteristics.The implementation of NR 1 , NR 2 , and Chua diode is discussed as follows.

Implementation of NR 1
NR 1 is implemented using one CCTA block and two resistors, R 1 and R 2 , as illustrated in Fig. 6 .The V-I characteristics of NR 1 is obtained from the DC sweep analysis of NR 1 using IC-based CCTA.This is depicted in Fig. 7 .The V-I characteristic curve has three distinct regions separated by two symmetrically placed breakpoints ( ± BP 1 ).The central region between the two breakpoints has a negative slope (m 11 ), while the other two outer regions have positive slopes (m 01 ).The slopes in these regions represent the rates of change of current with respect to voltage.A three-segment non-linear charatersitics with negative inner slope m 11 , outer slope m 01 , and breakpoints ± V BP1 can be observed in Fig. 7 .
Inner slope m 11 , outer slope m 01 , and breakpoints ± BP 1 are discussed and formulized as follows:

Calculation of inner slope (m 11 )
On applying the port-relationship of the CCTA in the Fig. 6 , current I X can be expressed as: Again, by using the port relationship of CCTA, current I Z can be written as: On applying KCL (Kirchhoff's Current Law) at node A in Fig. 6 , we get On combinig ( 10) and ( 11) , the internal slope m 11 can be expressed as:

Calculation of external slope m 01 in the saturation region
On applying KVL (Kirchhoff's Voltage Law) in Fig. 6 , the input current I IN can be rewritten as: In saturation region, the voltage at Z-port reaches to the saturation values as   = ±  .Therefore, (13) can be rewritten as: Eq. ( 14) is an equation of straight line having a positive slope that can be expressed as:

Calculation of the first breakpoint voltages ( ± V BP1 )
Again, applying KVL in Fig. 6 , V Z can be expressed as: By putting the value of I Z From Eq. ( 10) in Eq. ( 16) , we get At the boundary of the saturation region,   = ±  and   = ±  1 , then ( 17) can be rewritten as:

Implementation of NR 2
Now, the NR 2 is implemented using one CCTA block and one resistor, R 3 , as illustrated in Fig. 8 .Similar to NR 1 , the V-I characteristics of NR 2 are obtained from the DC sweep analysis using IC-based CCTA.This is depicted in Fig. 9 , having three distinct regions separated by two symmetrically placed breakpoints ( ± BP 2 ).The central region between the two breakpoints has a negative slope (m 12 ), while the other two outer regions have positive slopes (m 02 ).The slopes in these regions represent the rates of change of current with respect to voltage.
A three-segment non-linear characteristic with negative inner slope m 12 , outer slope m 02 , and breakpoints ± BP 2 can be observed in Fig. 9 .

Calculation of internal slope m 12
On applying KCL at node B in Fig. 6 , we get using the port-relationship of CCTA in Eq. ( 12) , we get From Eq. ( 20) , the innerl slope m 12 can be expressed as:

Calculation of external slope m 02
On applying KVL in Fig. 6 , the input current I IN can be expressed as: In the saturation region, the voltage at O-port reaches to the saturation values as   = ±  .Therefore Eq. ( 22) can be rewritten as: Here, it can be noticed that Eq. ( 16) is an equation of a straight line having a slope m 02 :

Calculation of the second breakpoint voltages ( ± V BP2 )
Again, on applying KVL in Fig. 6 , the voltage of port-O can be expressed as: Using the port relationship of Eq. (3) in Eq. ( 25) , we get At the boundary of the saturation region,   = ±  and   = ±  2 , then (26) can be rewritten as:

Implementation of Chua diode
The proposed CCTA-based Chua diode has been designed by careful combining of the NR 1 and NR 2 , as shown in Fig. 10 .It has a negative slope (m 1 ) and positive slopes (m 0 ).The slopes represent the rates of change of current with respect to voltage.While combining the NR 1 and NR 2 , the resistor R 2 is intentionally removed (replaced by a short circuit) from the design as it always operates in the saturation region.Also, only one CCTA block has been used instead of two.As R 2 = 0, from Eqs. (15) and 18 , the outer slope and the breakpoints of NR 1 can be written as  01 = ∞ and ±  1 = ±  , respectively.
By applying the port-relationship of the CCTA in Fig. 10 , we get the current at Z-port, I Z as: Again, using the port-relationship, the current I O can be written as: On applying KCL at node B in Fig. 10 , we get From ( 23) , the inner slope (m 1 ) of the Chua's diode can be written as: From ( 5) , ( 14) , and ( 24) , m1 can be expressed as: Applying KCL at node B, again I IN can be written as: Now, for the saturation region where V O = ± Vsat, IIN can be written as: (27) is a straight line equation, which gives the outer slope (m 0 ) as: From ( 5) , (17) , and (28) , m1 can be expressed as:

Implementation of Chua chaotic oscillator
As the Chua diode introduces the most essential property, non-linearity, into the Chua chaotic oscillator, it becomes a crucial subject for research.Most researchers focus on designing an efficient and straightforward Chua diode using various analog building blocks.Following the same pattern, a CCTA-based Chua diode is designed as shown in Fig. 10 .Now, the Chua diode (NR) of the traditional Chua circuit, shown in Fig. 1 , is replaced with the proposed CCTA-based Chua diode, as shown in Fig. 12 .The final implemented CCTA-based Chua circuit is depicted in Fig. 13 .The rest passive elements are used as it is.

Method validation
First, the proposed circuits of NR 1 , NR 2 , and Chua diode are shown in Figs. 6 , 8 , and 10 , respectively, have been simulated in PSPICE using DC sweep analysis to observe the V-I characteristics of these circuits, as shown in Figs.7 , 9 , and 11 , respectively.In these figures, the respective slopes and breakpoints of the circuits are clearly indicated.An IC-based CCTA implementation, as shown in Fig. 3 , has been utilized in this DC sweep analysis.In this implementation, two ICs, AD844 and Max435, are used in a cascaded    Further, the proposed CCTA-based Chua chaotic oscillator, shown in Fig. 13 , is simulated using transient analysis to get the chaotic waveforms and attractors.In the simulation, first, the analog building block of the Chua circuit, CCTA, is implemented using a CMOS schematic, as shown in Fig. 2 .For the proper biasing of MOSFETs, ± 1.25V power supplies are utilized.A positive DC supply of 0.42V feeds M3, M4, and M5 gate terminals.The transconductance g m of CCTA is set by the bias currents I1 and I2.In this simulation, these   The FFT of the V C2 is shown in Fig. 17 , which confirms that the dominant operating frequency of the proposed chaotic oscillator is 37.5MHz.Also, chaotic attractors like a large limit cycle, double-scroll attractor, Rossler-type attractor, and I-periodic attractor are obtained by varying the resistance R, as shown in Figs.18 , 19 , 20 , and 21 , which again confirms the ability of the proposed chaotic oscillator circuit.A Monte Carlo simulation has been performed to evaluate the uncertainty and robustness of the proposed Chua chaotic circuit.For this simulation, all passive components used in Fig. 13 are assigned tolerances as follows: resistors R, R1, and R3 have 5%; capacitors C1 and C2 have 7%; and the inductor L has 7%.A uniform distribution has been used for 100 runs.The VC1 and VC2 waveforms for these 100 runs are analyzed and presented in histograms, as shown in Figs.22 and 23 .From Fig. 22 , a deviation of 0.0442349 is observed for the mean value of 0.848915.This indicates a deviation of 5.21% for the 100 runs, which is within the acceptable range.Similarly, in Fig. 23 , a deviation of 0.0422423 is observed for the mean value of 0.916029.This indicates a variation of around 4.61% across the 100 runs, also falling within the permissible bounds.

Conclusion
A CCTA-based Chua chaotic oscillator is implemented to generate chaotic waveforms in the electronics lab.First, a straightforward Chua diode, called a non-linear resistor, is designed by combining two CCTA-based negative resistances.This Chua diode is further used in the traditional Chua circuit to obtain a high-frequency CCTA-based Chua chaotic oscillator.The proposed NR 1 , NR 2 , and Chua diode circuits are simulated using an IC-based CCTA to obtain their V-I characteristics.The proposed Chua circuit is simulated using a CMOS implementation in 180nm technology to get a high dominant operating frequency.Three chaotic waveforms, V C1 , V C2 , and I L , are obtained in the simulation.Various chaotic attractors are also obtained along with the chaotic waveforms, confirming the proposed circuits' ability to generate sustained chaotic waveforms.A Monte Carlo simulation has been performed to evaluate the uncertainty and robustness of the proposed Chua chaotic circuit and found variations falling within the acceptable range.

Limitations
Not applicable.

Table 1
Aspect ratio of NMOS and PMOS transistors used in Fig.2.